Lithographic method for small line printing

ABSTRACT

The minimal feature width (CD) of a pattern of device features configured in a substrate layer by means of a lithographic process can be reduced considerably, without reducing process latitudes (DOF), by substantially extending the post-exposure bake step and reducing the exposure dose. By the same measures the isofocal CD can be tuned to the design CD so that for an arbitrary CD process latitudes are enlarged.

The invention relates to a method of forming a pattern of featureshaving sub-micron width in a device substrate layer, which methodincludes the steps of

forming a resist layer of one of the resist types: positive resist andnegative resist on the substrate;

providing a mask having a mask pattern corresponding to the pattern offeatures to be formed in the substrate layer;

illuminating the resist layer via the mask pattern by means of aprojection beam providing an exposure dose, thereby generating an acidconcentration profile in the resist layer around each imaged feature;

heating the illuminated resist layer during a post exposure baking (PEB)step so that, starting from the highest illumination intensity areas,the material of a positive resist layer becomes soluble and the materialof a negative resist layer becomes insoluble, respectively in adeveloper solution;

developing the resist layer in the developer solution so that resistmaterial is removed from resist layer areas having a solubility above athreshold value so that a resist profile pattern is obtained, and

removing material from or adding material to areas of the substratelayer, which areas are delineated by the resist profile pattern so thatthe required pattern of features is formed in the substrate layer.

The invention also relates to a method of manufacturing a device, usingthis patterning method and to a device manufactured by means of themethod.

This method may be used, amongst others, in the manufacture of devices,like integrated circuits (ICs), by means of masking, material removingand implantation techniques.

A positive resist layer is understood to mean a resist layer of whichilluminated areas are removed during the developer step. A negativeresist layer is understood to mean a resist layer of whichnon-illuminated areas are removed during the developer step.

A substrate is understood to mean a plate of material, for examplesilicon, into which a complete multilevel device, such as an IC, is tobe formed level by level by means of a number of successive sets ofprocessing steps. Each of these sets comprises as main processing steps:coating a radiation sensitive, or resist, layer on the substrate,aligning the substrate with a mask, imaging the mask pattern of thismask in the resist layer, developing the resist layer, etching orimplantation of the substrate via the resist layer and further cleaningand other processing steps. The term substrate covers substrates atdifferent stages in the manufacture process, i.e. both a substratehaving no or only one level of already configured device features and asubstrate having all but one level of already configured devicefeatures, and all intermediate substrates.

The method uses a lithographic projection apparatus, which apparatus isan essential tool in the manufacture of ICs. The projection apparatus isused to image successively different mask patterns at the same area of asemiconductor substrate, each mask pattern at a different level, or in adifferent layer, of the substrate. This apparatus includes, in thisorder, an illumination unit for supplying a projection beam, a maskholder for accommodating a mask, a substrate holder for accommodating asubstrate and a projection system arranged between the mask holder andthe substrate holder. The mask is provided with a mask patterncorresponding to the pattern of device features that is to be formed inthat substrate layer that is to be configured by the specific maskpattern. The projection system, which may be a system of lenses or asystem of mirrors or a combination of such systems, forms an image,known as aerial image, of the mask pattern on a resist layer coated onthe substrate. The aerial image shows an intensity distributioncorresponding to the mask pattern.

In the illuminated, or exposed, areas of the resist layer an acid isgenerated, which acid is partly neutralized by a quencher. Usually theexposure step is followed by a step of baking the resist layer, whichstep is called the post-exposure baking (PEB) step. In a positive resistlayer, the thermal activation by means of the PEB step causes theremaining acid to start removing solubility-blocking groups, which arepresent in the polymer chain of the resist. The effect of this action,which is known as de-protecting the resist, is that the resist becomessoluble in an aqueous developer once the de-protection action has takenplace up to a given extent, or has reached a threshold level. This meansthat, for a given duration of the PEB step, the resist polymer willbecome soluble in those areas where the aerial image intensity exceeds agiven threshold intensity. In a negative resist layer the thermalactivation causes protection of the resist, i.e. soluble resist that issoluble in a developer solution becomes insoluble.

Since it is desirable to steadily increase the number of electroniccomponents in an IC device and the operating speed of such a device, theminimum width of the device features, or -lines, also called thecritical dimension (CD), and the distance between these features shouldsteadily be decreased. As a consequence, mask patterns with increasinglysmaller pattern features and smaller distances between these featuresshould be imaged. The minimum size of pattern features, which can beimaged with the required quality by a lithographic projection apparatus,depends on the resolving power, or resolution, of the projection systemof this apparatus and the structure of the mask pattern. This resolutionis proportional to λ/NA, wherein λ is the wavelength of the projectionbeam and NA is the numerical aperture of the projection system.Increasing the numerical aperture and/or decreasing the wavelength couldincrease the resolution. In practice, an increase of the numericalaperture, which is fairly large in current lithographic projectionapparatus, is not very well possible because this reduces the depth offocus of the projection system, which is proportional to λNA². Moreover,it becomes too difficult to correct the projection system foraberrations across the entire required image field if the numericalaperture is further increased. Reducing the wavelength in the deep UV(DUV) region from 193 nm, as used in current lithographic projectionapparatus, to 157 nm, for example, poses new problems with respect tomaterials for the optical elements of the projection system and toresist materials, which are sufficient sensitive to radiation of thiswavelength. For a next generation of lithographic projection apparatusit has been proposed to use extreme UV (EUV) radiation with a wavelengthin the order of 13 nm. It is true that use of such radiation allowsimaging of considerably finer pattern structure, but the design anddevelopment of an EUV projection apparatus is a very challenging andtime consuming task. As EUV radiation is easily absorbed by air, thepath of the projection beam should be in vacuum, which poses specificand new problems. A suitable and efficient EUV radiation source is notavailable yet and also new resist materials, sensitive to EUV radiationhave to be developed. An EUV lithographic projection apparatus suitablefor the production of ICs, or other devices, will not become availablein the next years.

Thus, there is a large need for a method of manufacturing of deviceshaving device features, or -lines, considerably smaller than those ofcurrently manufactured devices, which method uses a conventionalprojection apparatus and masks patterns having conventional featuresizes. Configuring such small lines, having a width smaller than 100 nm,in a device substrate layer may also be called very small line (VSL)printing.

For printing such very small lines from conventional mask patterns, theexposure dose, i.e. the amount of electromagnetic energy used forimaging a line, could be increased to an over-exposure level. The effectof over-exposure is that the amount of acid molecules, which remove thesolubility-blocking groups from the positive resist polymer chain,increases and that these molecules can reach resist regions close to thecenter of a line to be printed. This center corresponds to an intensityminimum in the aerial image projected on the resist layer, which minimumcorresponds to a black line of a binary mask pattern, i.e. a black andwhite pattern. In this way resist regions under the aerial image linebecome soluble so that, after developing and etching of the resistlayer, the obtained device feature in the substrate layer is smallerthan the corresponding line in the aerial image.

However, the width of device features obtained by means of theover-exposure process is extremely dependent on focus variations in theprojection system. If the projection beam is focused on the resistlayer, the features of the aerial image projected on this layer haveminimum dimensions. If the focus plane of the projection system shiftswith respect to the resist layer, the mask pattern is no longer sharplyimaged on the resist layer and the dimensions of the imaged features inthe resist layer increase. This means that the maximum intensities inthe aerial image received by the resist layer decreases, which resultsin increased line width in case a positive resist is used. A secondproblem that may occur with over-exposure is line collapse, i.e. therequired pattern feature, or -line vanishes, due to over-development andsubsequently over-etching. A third problem with over-exposure is thatresist on the top of a required resist profile gets lost, which mayresult in unwanted etching of a required pattern feature.

The above-mentioned problems may be reduced by using extreme off-axis,or skew, illumination of the resist layer, such as the well-known dipoleor quadrupole illumination, or by using phase-shifting mask patterns,instead of binary mask patterns. However, the image quality obtainedwith off-axis illumination is extremely dependent on the orientation ofthe pattern features and on the periodicity, or pitch, of features inthe pattern. Phase-shifting masks are very expensive compared withbinary masks, which is prohibitive especially if the number of ICdevices to be produced by means of a specific mask is not very large.

Another problem encountered with lithography methods in general is thatthe size of the features configured in the substrate layer should beequal to M times the target size, M being the magnification of theprojection system. The target size is fixed in the IC design, thus inthe mask pattern, and is called hereinafter the design width.Irregularities in the lithographic process, of which focus variationsand exposure dose variations are the most important ones, may causedifferences between the actual size and the target size. Focusvariations may not only be caused by imperfections of the projectionsystem, but may also result from projecting an aerial image on a resistlayer which shows a topography due to feature patterns configured inlower substrate layers by means of preceding lithographic processes.However, for each lithographic process there is a specific feature size,called isofocal CD, for which relatively large focus and dose variationscan be tolerated, because they have a relatively small influence on thesize of the feature being configured. This isofocal CD is stronglydependent on the resist used and on the neighborhood structure of thefeature in the design pattern and thus in the aerial image.Unfortunately, the isofocal CD usually is not equal to the feature sizein the design pattern. This means that the lithographic processlatitudes, i.e. process tolerances, are very small and that very highrequirements have to be set to the depth of field of the projectionsystem and to the exposure dose.

It is an object of the invention to provide a method of the typedescribed in the opening paragraph, which method allows configuringpatterns of features having a width smaller than 100 nm and/or has largeprocess latitudes. This method is characterized in that the timeduration of the PEB step and the exposure dose are adapted to the designwidth of the features to be formed.

The invention is based on the insight that the PEB time duration can beused as a tuning process parameter. For, this time duration, in additionto the exposure dose, determines to which distance from a resist regionof minimum illumination acid molecules, generated in regions of maximumillumination, can diffuse through the resist. Thus the PEB time durationis used to control the size of the resist areas which are made solubleand will be removed in the developing step. This holds for a positiveresist layer. In the case of a negative resist layer the PEB timeduration controls the extent to which soluble resist becomes insoluble.Said insight can be used to solve the above-mentioned problems.

An embodiment of the method, wherein during the PEB step transitionsbetween non-soluble and soluble resist material initially have anegative slope, is characterized in that an enlarged PEB time durationis used to push the slopes to at least zero slopes and preferablypositive slopes.

In currently used lithographic processes wherein the PEB time durationis, for example, 90 sec, the acid concentration profile in the resistlayer has negative slopes, which means that the transitions betweennon-soluble and soluble resist material have a negative slope. For apositive resist a negative slope means than the top surface area of arequired, non-soluble resist, feature is larger than its base area Sucha resist feature is less stable during the developing step than a resistfeature having positive slopes, i.e. having a top surface area smallerthan its base area For a negative resist feature a negative slope meansthat the top surface area of a required, soluble, resist feature issmaller than its base, which may cause difficulties in removing thesoluble resist portion. As the PEB step changes the acid concentrationprofile in the resist layer and thus the position and slopes of thetransition between non-soluble and soluble resist material, the PEB timeduration can be used as a process parameter to change the slopes fromnegative slopes to at least zero slopes and preferably positive slopes.

The method may be further characterized in that a resist layer having athickness in the range of 300 to 350 nm is used.

It has been found that use of the method in combination with a resistlayer having a thickness of the order of 300 nm, for example in therange of 320 to 330 nm, provides excellent results.

The method may be further characterized in that a resist having anadapted radiation absorption gradient is used to reduce changes in theslopes of transitions between non-soluble and soluble resist material,which are due to extended PEB time duration.

This method can be used if a specific slope, for example of 90°, isrequired for the transitions between non-soluble and soluble resistmaterial. A slope of 90° means that a fictive wall separatingnon-soluble and soluble resist material is perpendicular to the surfaceplanes of the resist layer. For a lithographic process which is designedsuch that such a slope is obtained by using a conventional PEB time of90 sec, the slope will change when using a longer PEB time. For example,when a PEB time of 180 sec is used, a positive slope of 80° will beobtained (for a positive resist). This is due to absorption of exposureradiation by the resist layer, which causes the exposure intensity atthe top of the layer to be higher than at the base of the layer.According to the invention for a positive resist so-called surfaceinhibition may be used so that less radiation is absorbed at the top ofthe resist. For a negative resist resist surface enhancement may beused, together with developing the resist with a higher concentrationdeveloper than usual.

Using a longer PEB time may affect the throughput of the lithographicprocess. Throughput is understood to mean the number of substrates thatcan be processed in a unit of time. The exposure time of a lithographicprojection (exposure) apparatus is for example 90 sec. If, as is usualin a conventional process the PEB time is also 90 sec, a steady flow ofexposed substrates from the exposure apparatus to the PEB device, alsocalled hot plate, can be maintained. If the PEB time is, for example 260sec, a substrate that has been exposed has to wait 170 sec before it canbe placed in the PEB device, which means that the throughput of theprocess is considerably decreased.

According to the invention the high throughput can be maintained if themethod is further characterized in that for carrying out the PEB stepsfor successively illuminated substrates a number of PEB devices is used,which number corresponds to the ratio of the PEB time duration and theexposure time for one substrate.

For the given example with an exposure time of 90 sec, inclusive ofalignment of the substrate relative to the mask pattern and a PEB timeof 260 sec, three PEB devices may be used. If, for example, a firstexposed substrate is transported to the first PEB device, a secondexposed substrate to the second PEB device, a third exposed substrate tothe third PEB device, a fourth exposed substrate to the first PEB deviceand so on, the original high throughput can be maintained, effective usebeing made of the fact that at an IC (device) manufacturing site, alsocalled a Fab, a number of hot plates are present, which are not in usesimultaneously. In the new method the hot plates are used during timeintervals which partly overlap.

A general problem encountered in lithographic processes is that thefeature printed from a dense line having a given design CD, thus a CD ina mask pattern, is broader than the printed feature from an isolatedline having the same design CD. An isolated line, or feature, isunderstood to mean a feature having no neighboring features in asurrounding area of a size of the order of the feature width. A denseline, or feature is understood to mean a feature, which forms part of aseries of features at a mutual distance in the order of the width of thefeature. For example, an isolated feature having a design CD of 100 nmis printed as a feature having a width of 90 nm, whilst a dense featureprint has a width of 110 nm. To solve this problem, i.e. reduce oreliminate the difference in printed width, the isodense bias principlecan be used. This principle is based on optical proximity correction(OPC). OPC means that in the neighborhood of a design device feature oneor more additional features are arranged. The additional features are sosmall that they are not imaged as such, but they do influence the wavefront of the exposure beam portion that images the design feature andthus the image of the design feature. By means of specific OPC featuresin the mask pattern the printed feature width from a dense feature andfrom an isolated feature can be made equal to each other.

However, it was discovered that an increase of the PEB time causes anincrease of the difference between the width of a printed dense featureand the width of a printed isolated feature. For example, if the PEBtime is increased from 90 sec to 260 sec, the width of the printedisolated feature will be 100 nm and that of the printed dense featurewill be 130 nm. The original OPC features cannot correct the differencein width.

This problem will be eliminated if the method is further characterizedin that in the design stage the envisaged PEB time duration is used as adesign parameter to determine the design width of the design pattern offeatures.

The OPC features for printed feature width correction can now be adaptedto the PEB time to be used so that the width difference can beeliminated again. In this way a further refinement of the method isobtained. It is also possible to adapt other OPC features, which areused for purposes other than printed line width control, to the PEB timeduration chosen.

According to a first aspect of the invention the method is characterizedin that the time duration of the PEB step is enlarged to form devicefeatures having a smallest dimension, which is smaller than thecorresponding smallest dimension of an aerial image of the mask pattern,the aerial image being formed by the projection beam in the resistlayer.

In this embodiment of the method the PEB time is used as a means tocontrol the width of the device features to be formed, especially toreduce this width by enlarging the PEB time.

This embodiment is preferably further characterized in that the PEB stepis performed during at least 140 seconds and that a correspondinglysmaller exposure dose is used to obtain feature widths smaller than 80nm.

By using a smaller exposure dose the amount of acid molecules isreduced, especially in the neighborhood of the minimum intensity regionsand the threshold value of this amount to effect de-protection of apositive resist is reached at a larger distance from the minimumintensity regions. At such a larger distance the aerial image intensityis much less sensitive to focus variations. A considerable increase ofthe PEB time duration from the standard 90 seconds to longer than 140seconds, for example 260 seconds, allows also the small amount of acidmolecules present in the areas close to the minimum intensity regions tode-protect the resist. Thus also the resist close to the center of theminimum intensity regions becomes soluble so that the width of thepattern features is decreased, despite the low exposure dose used. Thegreat advantage of this method is that for the low exposure dose rangethe intensity variation due to focus variation is much smaller. Sincethe (longer) PEB step and the (more efficient) use of the acid are notsensitive to focus errors caused by the projection apparatus, it becomespossible to print very small, for example 40 nm broad, lines withrelative large process latitudes.

The above holds for a positive resist. Similar effects occur in anegative resist on the understanding that the resist becomes protected,instead of de-protected.

In this way the possibility to print in a controllable and reliable wayever decreasing line widths by means of conventional lithographic toolsis substantially enlarged.

The above-mentioned line width of 40 nm is given as an example of whatis possible. The invention can also be used to print line width largerthan 40 nm and smaller than the width obtainable by conventional means.The elongation of the PEB time depends on the minimum line width to beprinted, the larger this width, the smaller the required elongation is.The said 260 sec PEB time is eminently suitable to print 40 nm broadlines. For printing line width from 40 nm up to 80 nm, which is stillvery small, PEB time durations from 260 sec up to 140 sec, which isstill pretty much larger than the conventional PEB time duration, may beused.

According to a second aspect of the invention the method ischaracterized in that the isofocal CD is tuned to the design CD byadapting the PEB time duration and the exposure dose.

In this way, large process latitudes for printing both very small andlarger design CDs are obtained. Tuning the isofocal CD to the design CDis understood to mean not only that the isofocal is made equal to thedesign CD, but also that the isofocal CD is brought more closely to thedesign CD.

A first embodiment of the method is characterized in that use is made ofa binary mask pattern.

A binary mask, which may comprise a transparent substrate and a patternof, for example, chromium features on one side thereof, is the cheapesttype of lithographic mask. Using such a mask in combination with the newmethod can substantially reduce the minimum line width that can beprinted with such a mask and/or can enlarge the printing processlatitudes considerably.

A second embodiment of the method is characterized in that use is madeof a phase shifting mask pattern.

The phase shifting mask may be a pure phase shifting mask, also called achrome-less mask. In such a mask the borders of the device features aremarked by small areas, which introduce phase shifts in the projectionbeam. The phase shifting mask may also be a mask wherein the devicefeatures are non-transparent, for example chromium, features, theborders of which are marked by phase shifting areas. The phase shiftedbeam portions of a mask feature interfere with each other to form animage feature that may be considerably smaller than the image featurethat can be obtained from the same mask feature on a binary mask. Usinga phase shifting mask in combination with the new method can furtherreduce the printable line width and/or can enlarge printing-processlatitudes considerably.

The invention also relates to a method of level-by-level manufacturingof a device, which comprises device features distributed over differentlevels, which method employs a number of processes for configuringdevice features, each process for one device level. This method ischaracterized in that at least one of the configuring processescomprises the method as described hereinbefore.

As the new pattern forming method results in a device having smallerminimum device features and/or better defined feature sizes, theinvention is also embodied in such a device.

These and other aspects of the invention are apparent from and will beelucidated by way of non-limitative example with reference to theembodiments described hereinafter.

In the drawings:

FIG. 1 schematically shows an embodiment of a lithographic projectionapparatus by means of which the method can be carried out;

FIG. 2 shows the depth of focus as a function of the CD for a currentstandard lithographic process and for a process wherein the invention isused;

FIG. 3 shows a block diagram of a standard lithographic process;

FIG. 4 shows an intensity distribution of an aerial image for differentdefocus values;

FIGS. 5 a and 5 b show Bossung plots of a print of a binary mask featureobtained by means of a standard process and a process wherein theinvention is used, respectively;

FIGS. 6 a and 6 b show Bossung plots of a print of a phase shifting maskfeature obtained by means of a standard process and a process whereinthe invention is used, respectively, and

FIGS. 7, 8 and 9 show how the isofocal CD can be tuned by means ofchanging the post-exposure time duration and the exposure dose.

In the schematic diagram of FIG. 1 only the most important modules of anembodiment of a lithographic projection, or exposure, apparatus areshown. This apparatus comprises a projection column wherein a projectionsystem, for example, a lens projection system PL is accommodated. Abovethis system a mask holder MH for carrying a mask MA is arranged, whichmask comprises a mask pattern C to be imaged. The mask pattern is apattern of features corresponding to the features to be configured in alayer of a substrate, or wafer, W. The mask holder forms part of a masktable MT. A substrate table WT is arranged in the projection columnbeneath the projection lens system. The substrate table is provided witha substrate holder WH for holding a substrate, for example asemiconductor wafer, W. A radiation-sensitive layer PR, for example aphotoresist layer, is coated on the substrate. The mask pattern C shouldbe imaged a number of times in the resist layer, every time in anotherIC area, or die, Wd. The substrate table is movable in the X- andY-direction such that, after the mask pattern has been imaged in an ICarea, a next IC area can be positioned under the mask pattern and theprojection system.

The apparatus further comprises an illumination system that is providedwith a radiation source LA, for example a mercury lamp or an excimerlaser like a Krypton-Fluoride excimer laser, a lens system LS, areflector RE and a collector lens CO. A projection, or exposure, beam PBsupplied by the illumination system illuminates the mask pattern C. Theprojection system PL images this pattern in an IC area on the substrateW.

The apparatus is further provided with a number of measuring systems. Afirst measuring system is an alignment measuring system for determiningalignment, in the XY-plane, of the substrate with respect to the maskpattern C. A second measuring system is an interferometer system IF formeasuring the X- and Y-position and the orientation of the substrate.Also present is a focus-error detection system (not shown) fordetermining a deviation between the focus, or image, field of theprojection system and the radiation-sensitive layer PR on the substrate.These measuring systems are parts of servo systems, which compriseelectronic signal processing- and control circuits and actuators bymeans of which the position and orientation of the substrate and thefocus can be corrected using the signals delivered by the measuringsystems.

The alignment detection system uses two alignment marks M₁ and M₂ in themask MA, which marks are shown in the right top section of FIG. 1. Thesemarks are, for example, diffraction gratings, but may also beconstituted by other marks, like squares or strokes, which are opticallydifferent from their surroundings. Preferably the alignment marks aretwo-dimensional, i.e. they extend in two mutually perpendiculardirections, the X- and Y-direction in FIG. 1. The substrate W comprisesat least two alignment marks, two of which, P₁ and P₂ are shown inFIG. 1. These marks are positioned outside the area of the substrate Wwhere the images of the mask pattern have to be formed. Preferably thegrating marks P₁ and P₂ are phase gratings and the grating marks M₁ andM₂ are amplitude gratings. The alignment detection system may be adouble system wherein two alignment beams b and b′ are used fordetecting alignment of the substrate mark P₂ with respect to the maskmark M₂ and for detecting alignment of the substrate mark P₁ withrespect to the mask mark M₁, respectively. After having traversed thealignment detection system, each of the alignment beams is incident on aradiation sensitive detector 3 and 3′, respectively. Each detectorconverts the relevant beam into an electrical signal that is indicativeof the degree to which the substrate mark is aligned with respect to themask mark, and thus the degree in which the substrate is aligned withrespect to the mask. A double alignment detection system is described inU.S. Pat. No. 4,778,275, which is referred to for further details aboutthis system.

For accurately determining the X- and Y-position of the substrate, thelithographic apparatus comprises a multiple-axis interferometer system,which is schematically indicated by the block IF in FIG. 1. A two-axisinterferometer system is described in U.S. Pat. No. 4,251,160 and athree-axis interferometer system in U.S. Pat. No. 4,737,823. In EP-A0,498,499 a five-axis interferometer system is described, by means ofwhich both displacements along the X- and Y-axis and rotation about theZ-axis and tilts about the X-and Y-axis can be measured very accurately.

As indicated in FIG. 1, the output signal Si of the interferometersystem and the signal S₃ and S₃′ of the alignment detection system aresupplied to a signal processing circuit SPU, for example a microcomputer, which processes these signals to control signals Sac for anactuator AC. This actuator moves the substrate holder WH in theXY-plane, via the substrate table WT.

The output signal of the above mentioned focus-error detection system isemployed for correcting focus errors, for example, by moving theprojection lens system and the substrate relative to each other in theZ-direction, or by moving one or more lens elements of the projectionsystem in the Z-direction. A focus-error detection system, which may befixed to the projection lens system, is described in U.S. Pat. No.4,356,392. A detection system by means of which both a focus-error and alocal tilt of the substrate can be detected is described in U.S. Pat.No. 5,191,200.

There is a steadily growing demand to decrease the details, the width ofa device feature, or -line, and the distance between neighboring devicefeatures, in order to increase the operating speed of the device and/orto increase the number of components in such a device. The smallness ofthe details which can be imaged in a satisfactory way by a lithographicprojection apparatus, of which FIG. 1 shows an example, is determined bythe imaging quality and resolving power of the projection system.Conventionally the resolving power, or resolution, has been improved byincreasing the numerical aperture NA and/or decreasing the wavelength ofthe projection radiation. A further increase of the numerical aperturecan hardly be expected in practice and a further decrease of thewavelength of the projection beam will pose a lot of new problems.

A more recent development on the way to imaging smaller pattern detailswith projection systems which can still be manufactured, is the use of astep-and-scanning lithographic apparatus, instead of a steppinglithographic apparatus. In a stepping apparatus, a full-fieldillumination is used, i.e. the entire mask pattern is illuminated in oneoperation and imaged as a whole on an IC area of the substrate. After afirst IC area has been exposed, a step is made to a next IC area, i.e.the substrate holder is moved in such a way that the next IC area ispositioned under the mask pattern. Thereafter this IC area is exposed,and so forth until all IC areas of the substrate are provided with animage of the mask pattern. In a step-and-scanning apparatus only arectangular or circular-segment-shaped area of the mask pattern isilluminated and hence also a corresponding sub-area of the substrate ICarea is exposed each time. The mask pattern and the substrate are movedsynchronously through the projection beam, while taking themagnification of the projection system into account. In a continuousprocess subsequent sub-areas of the mask pattern are then each timeimaged on corresponding sub-areas of the relevant IC area. After imagingthe entire mask pattern on an IC substrate area in this way, thesubstrate holder performs a stepping movement, i.e. the beginning of anext IC area is moved in the projection beam. The mask is then set, forexample, in its initial position, whereafter said next IC area isscan-exposed. As in the step-and-scanning method only the central partof the image field is used and thus only this part needs to be correctedfor optical aberrations, a relatively large numerical aperture can beemployed. In this way the width of the device features and theirinterspaces, which can be imaged with the required quality, can bedecreased to a certain degree. However, increasing the density of devicepatterns by optical means will not be sufficient for next generations ofICs and other devices. Moreover, the theoretical limit, set by thenumerical aperture, the wavelength and the scanning principle will notbe reached in practice, due to imperfections of the apparatus, likeoptical aberrations, and imperfections of the lithographic processes.

The use of a projection system, which is capable of forming an image,also called aerial image, in the resist layer, which image has verysmall lines ( VSL) does not guarantee that correspondingly small devicefeatures can be configured in the device substrate layer. Whenconfiguring very small features in a substrate layer two main problemsarise, namely line collapse and the very high sensitivity of the processto focus variations. For a positive resist line collapse is thephenomenon, that resist is removed from positions where it should remainso that a required feature, or -line, disappears. The influence of focusvariations on the capability of the lithographic process to configuresmall lines is illustrated in FIG. 2.

FIG. 2 shows the depth of focus DOF (in pun) as a function of therequired minimum feature width (CD: critical dimension) for a standardprocess and for a design line width of 100 nm. Curve C-1 represents thecase of a dense line, i.e. a line from a pattern having a number of suchlines spaced 140 nm apart, whilst curve C-2 represents the case of anisolated line. The pattern and the line are binary mask patterns. Abinary mask is understood to mean a mask comprising a transparentsubstrate, one side of which is provided with a configuration ofnon-transparent regions, which together represent the design pattern.The non-transparent regions usually are made of chromium. The depth offocus is understood to mean the range of defocus values for which theresulting line width variation remains within plus/minus 10% of thedesign line width. As mentioned hereinbefore and will be discussed lateron, the feature width smaller than 100 nm shown in FIG. 2 can be printedby means of over-exposure of a 100 nm line width pattern. FIG. 2 clearlyshows that the depth of focus strongly decreases with decreasing CD,especially for the dense line (curve C-1); the DOF is already as smallas 100 nm for a CD of 85 nm. The difference between curve C-1 and thecurve for the isolated line C-2 is caused by the difference between theaerial image intensity distribution of an isolated line and a (dense)line forming part of a series of lines.

FIG. 3 shows a block diagram of the lithographic process steps, whichare relevant for the present invention. For this and following Figures,it is assumed that a positive resist is used.

Block B-1 denotes the step of providing a substrate layer, which is tobe configured with a pattern of device features, with a resist layer andpositioning the substrate in a projection apparatus, like that of FIG.1.

Block B-2 denotes the step of designing and providing a mask, whichcomprises a mask pattern corresponding to the pattern of the devicefeatures to be configured, and placing this mask in the projectionapparatus.

Block B-3 denotes the step of illuminating the resist layer via the maskpattern by means of an exposure beam, which provides the requiredexposure dose. In the exposed portions of the resist acid molecules arefreed in a controlled way by means of a quencher, which partlyneutralizes the acid molecules.

Block B-4 denotes the step of removing the substrate with the exposedresist layer from the projection apparatus and placing it in oven toundergo post exposure baking during a pre-determined time. In a positiveresist the PEB thermally activates the remaining acid molecules, whichstart to remove the solubility-blocking groups present in the resistpolymer chain. This activity is known as de-protecting the resist. As aresult, the resist becomes soluble once de-protection has reached agiven level, or threshold. Given a fixed PEB time duration, aerial imageintensity at least equal to a threshold intensity is needed to renderthe resist soluble.

Block B-5 denotes the step of removing the substrate from the PEB deviceand placing it in a developer solution to remove the soluble portions ofthe resist so that a resist pattern is obtained.

Block B-6 denotes the step of removing the substrate from the developersolution and placing it in an etching device and/or an implantationdevice. Thereby material is removed from and/or added to layer regionsdelineated by the resist pattern D obtained in block B-5 so that ICregions with required properties are obtained. For the manufacture of acomplete (IC) device, the series of lithographic steps shown in FIG. 3and preparatory and intermediate steps are repeated a number of timesequal to the number of device substrate layers to be configured.

For configuring device features, or -lines, having sub 100 nm width,over-exposure, i.e. exposure using an enlarged radiation dose, can beused. The effect of over-exposure is that the threshold aerial imageintensity is reached also in resist areas close to the center of theaerial image intensity minimum, which center corresponds to the centerof the line to be formed. This means that the resist in these areasbecomes soluble also so that, after the developing step, a resist linesmaller than the aerial image line will remain, which very small line isdenoted by VSL.

A disadvantage of VSL printing by means of over-exposure, whichdisadvantage is very important in practice, is that the printed linewidth is very sensitive to focus variations, as shown in FIG. 2 by meansof curves C-1 and C-2, and for line collapse. The strong sensitivity tofocus variation can be understood by looking at the aerial imagebehavior when focus errors occur. FIG. 4 shows, for a 100 nm isolatedline in a binary mask pattern, the aerial image intensity I_(AI) (inarbitrary units) as a function of the position x in the resist layer fordifferent defocus (DF) values, from 0 to 0.6 μm in steps of 0.1 μm. Foreach defocus value a separate curve DF1-DF6 is shown. Position x=0corresponds to the center of the intensity minimum in the aerial image,thus to the position where the very small line has to be printed. In thearea I around the position x=0 the aerial image intensity sharplyincreases with increasing defocus. For the feature configured in thesubstrate layer this would mean that its width is very sensitive tofocus errors. This, together with line collapse, causes a very smalldepth of focus. In other words there is a small or even no processwindow for printing very small lines if over-exposure is used. Anotherdisadvantage of the over-exposure technique is that a lot of resistmaterial on top of the resist profile gets lost.

According to the invention, for VSL printing small exposure dosestogether with long PEB time duration are used. For a small exposuredose, the small amount of acid molecules in the vicinity of the aerialimage intensity minimum, thus in region I in FIG. 4, that is generatedas such is insufficient to render the polymer resist soluble in thisregion. The threshold value for developing the resist will only bereached in a region II remote from region I. In region II the aerialimage intensity is considerably less sensitive than in region I. If onlya low exposure dose were used, rather broad lines would have beenprinted. However a more efficient use is made of the small amount ofgenerated acid molecules by extending the duration of the post exposurebaking, or de-protecting, step. This allows the same amount of acidmolecules to de-protect more polymer sites. The smaller acidconcentrations close to the aerial intensity minimum now becomessufficient to render the resist soluble so that a very small resist lineremains after development. Since the extended PEB step and the moreefficient use of the acid molecules are not influenced by focusvariations, which are caused by the optical system, a large improvementin depth of focus is obtained.

The new processing technique also provides a solution to the problem ofline collapse. The effect of using a lower exposure dose and an extendedPEB time duration is that the slopes of the resist profile are morepositive. Such a slope is understood to mean the transition from the topof a resist feature, or -line, to its base, i.e. the wall of such line.For a resist line having positive slopes the top is smaller than thebase. Such a resist line is more stable during succeeding processingsteps and less sensitive to line collapse. The longer PEB step may alsoprovide an improved adhesion of the resist polymer to the devicesubstrate, which also prevents line collapse.

The combination of the considerably smaller sensitivity to focusvariations, i.e. the larger DOF, of the new processing technology andthe considerably reduced chance of line collapse results in asubstantially enhanced capability to print very small lines. This isillustrated in FIG. 2 by curves C-3 and C-4. These curves show, for thesame dense line and for the same isolated line used for curves C-1 andC-2, respectively, the depth of focus as a function of the required CD.It is immediately clear that the new processing technology allowsprinting of considerably smaller CDs and provides substantiallyincreased DOF for small CDs, down to 50 nm and smaller.

The data of FIG. 2 are calculated from the Bossung plots shown in FIGS.5 a and 5 b. It is usual to characterize a lithographic printing processby making a series of prints of the same feature, or -line, whilechanging exposure dose and focus setting in discrete steps across thesubstrate. The printed lines are observed, for example by means of ascanning electron microscope (SEM) so that a Focus-Exposure Matrix (FEM)is obtained. When the measured CD values are plotted as a function ofdose and focus, a so-called Bossung plot is obtained. FIG. 5 a shows aBossung plot obtained from a binary mask having a pattern of 100 nmchromium lines spaced at 140 nm by means of a current standard process,using a PEB time duration of 90 sec. A resist layer having a thicknessof the order of 300 nm and comprising a resist of the type AR 237, whichis a well-known resist for lithography, was used. CD values (in nm) areplotted as a finction of defocus values DF (in μm) for eight differentexposure doses, ranging from 13,80 to 19,40 mJ/cm² (graphs ED₁ to ED₈).FIG. 5 a shows that for the denoted process parameters the smallest linewidth (CD) that can be printed is 80 nm. For this CD a change in focusof only 200 nm can be tolerated, i.e. the DOF is only 200 nm. If largerfocus error occur the 80 nm line width cannot be printed.

FIG. 5 b shows the Bossung plot obtained from the same binary mask andby means of the same process, with the exception that the exposure dosesare smaller and that the PEB time duration is substantially extended, to260 sec. Twelve different exposure doses, in the range from 9.40 to16.00 mJ/cm², were used (graphs ED₁o to ED₂₁). FIG. 5 b shows that underthese circumstances line widths down to 40 nm can be printed and thatmuch larger focus variations can be tolerated. For a 80 nm line width afocus variation of 1200 nm is tolerable and for 45 nm line width thetolerable focus variation is 900 nm.

The enhancement with respect to the minimum CD and focus insensitivityof the new process is obtained without introducing dependency on thepitch and orientation of features in the mask pattern, as is the casefor alternative conventional enhancement techniques like dipole andquadrupole illumination.

If desired, the new process can also be combined with a conventionalmethod for resolution enhancement, by replacing the binary mask patternby a phase-shifting mask (PSM) pattern. In a phase shifting pattern, theborderlines of a feature are marked by areas, each of which introduces aphase shift in the illumination beam. By interference of the beamportions from these areas, a line width can be printed which is smallerthan the imaged line width from the same feature of a binary mask. Thisis illustrated in FIG. 6 a, which shows a Bossung plot of a pure phaseshifting mask line obtained with ten different exposure doses (graphsED₃₀ to ED₃₉) ranging from 28.00 to 37.00 mJ/cm². The CD values areobtained with a conventional standard process using a PEB exposureduration of 90 sec. FIG. 6 a shows that the smallest line width (CD)that can be printed in principle is 42 nm. However the DOF is verysmall, only 100 nm.

If for printing of the same phase shifting mask line lower exposuredoses and a PEB time duration of 260 sec is used, the Bossung plot ofFIG. 6 b is obtained. FIG. 6 b shows CD values obtained with sixdifferent exposure doses (graphs ED₄₀ to ED₄₅), ranging from 15,10 to18,60. The new process now allows printing line widths down to 36 nm andtolerating much larger focus variations, up to 580 nm for 37 nm widelines.

The mask pattern from which the Bossung plots of FIGS. 6 a and 6 b areobtained comprises only phase shifting areas. Such a mask pattern isalso called a chrome-less pattern because it does not comprisenon-transparent areas. The new method can also be used with a maskpattern comprising features in the form of non-transparent areas on theborders of which phase areas are arranged.

A second aspect of the invention relates to adaptation of theprocess-determined isofocal CD to the CD of the device feature design.The isofocal CD relates to the capability of the lithographic process toreduce the effects of changes in process parameters. The most severeeffects are caused by changes in exposure dose and focus variations,which is clear from the Bossung plots shown in FIGS. 5 a, 5 b, 6 a and 6b. However, for a specific feature width, which is called the isofocalCD, very large focus and dose variations can be tolerated. This isofocalCD is highly dependent on the surroundings of the feature in the designpattern and on the resist that is used. Unfortunately theprocess-determined isofocal CD usually does not coincide with thedesired feature width in the design, hereinafter referred to as designCD. This means that the process latitudes, or tolerances, usually arevery small, which makes it very difficult to run the lithographicprocess adequately.

As the isofocal line is determined, to a large extent, by the aerialimage that is offered to the resist layer and variations therein causedby focus variations, one could try to change, or improve this image toreach correspondence between the design CD and the isofocal CD. However,the aerial image generally is an essential element of the IC design.This aerial image can only be improved in the desired direction by meansof expensive and non-flexible means, like the use of phase shiftingmasks or extreme off-axis illumination, like dipole and quadrupoleillumination. The results of the latter types of illumination are highlydependent on the orientation and the periodicity (the pitch) of thefeatures in the mask pattern. Another option to render the isofocal CDequal to the design CD could be the use of another resist material. Thiswould shift the isofocal line, however, in a non-controllable way. Sincea change of resist material also affects other aspects of thelithographic process, this is not a real solution.

To reach correspondence between the design CD and the isofocal CD, theinvention uses the fact that during the PEB step of a positive resistthe acid molecules diffuse through the resist polymer from areas whichhave received maximum aerial image intensity to areas, which havereceived minimum intensity. As a result, the acid concentration profileobtained after the PEB step has been carried out is different from theoriginal acid concentration profile, which was defined by the aerialimage intensity distribution. The PEB step also influences the differentacid concentration profiles related to an aerial image feature, whichdifferent profiles would result from various focus positions of theaerial image and thus shifts the intersection of these profiles. Theposition where the different focal lines intersect each other willchange, for example, because most diffusion of acid molecules occurs atthe acid concentration profile showing the largest slope. Shift of theintersection position means shift of the isofocal line. The inventionuses the PEB time duration to tune the acid diffusion extend and thus tocontrol the final acid concentration profile and to tune the isofocalCD, which is related to said intersection. For, with a longer PEB timethe diffusion takes place over a longer extent and the final acidprofile is different from that obtained with a shorter PEB time.

Since the PEB time duration determines how effectively acid molecules,which are generated by the aerial image exposure of the resist, are usedto de-protect the resist polymer, the exposure dose should be adapted toavoid that too much resist material would be de-protected and removedduring the developing step. As the PEB time duration and the exposuredose determine how close to the center of a resist line, or -feature,resist becomes de-protected, and hence soluble, these parameters controlthe isofocal CD.

The effect of the simultaneous tuning of the PEB time duration and theexposure dose is made clear by means of FIGS. 7-9. FIG. 7 shows aBossung plot obtained by means of a current standard process, using aPEB time duration of 90 sec, from a dense line, of a pattern of 100 nmchromium lines spaced at 140 nm, in a binary mask. The exposure dosesare the same as those used for obtaining the plot of FIG. 5 a so thatthe plot of FIG. 7 is similar to that of FIG. 5 a. FIG. 7 shows best fitBossung curves for each exposure dose (ED₁-ED₈), instead of the linesconnecting the measured CD values of FIG. 5 a, to indicate to whichdegree CD values belonging to a given exposure dose are isofocal. Thesmaller the curvature of these curves, the better the isofocal situationis approximated for all CDs of the relevant exposure dose. For theprocess conditions of FIG. 7 the isofocal CD is situated around thedesign CD of 100 nm. The thick straight lines BL₁, BL₂ denote theboundaries of the CD values that are still tolerable. Generally, theselines are put at +10% and −10% of the design CD value.

FIG. 8 shows the Bossung plot obtained from the same binary mask and bymeans of the same process, with the exception that the PEB time durationhas been lowered to 30 sec and that the exposure doses have beenincreased. Seven different exposure doses, in the range of 32,00 to44,00 mJ/cm², were used (curves ED₅₀ to ED₅₆). For the processconditions of FIG. 8 the isofocal CD is situated around 130 nm; thecurve ED₅₀ for an exposure dose of 32,00 mJ/cm² shows the smallestcurvature. These conditions thus are not suitable for printing a designCD of about 100 nm between the boundary lines at 90 and 110 nm,respectively, but are very suitable for printing a design CD of about130 nm, the boundary lines being shifted to 120 and 140 nm,respectively. For the higher exposure doses of FIG. 8 the quencher isannihilated completely before substantial diffusion of acid moleculesstarts.

FIG. 9 shows the Bossung plot for the same binary mask as that used forFIGS. 7, 8 and FIG. 5 b. Now a substantially extended PEB time durationof 260 sec has been used, which is the same as that used for obtainingthe Bossung plot of FIG. 5 b. Also the exposure doses of FIG. 9 are thesame as those of FIG. 5 b so that the two Figures, show similar Bossungplots. In FIG. 9 curve ED₁₇, for an exposure dose of 13.60 mJ/cm², showsthe smallest curvature so that for the process conditions denoted inthis Figure the isofocal CD is situated around 60 nm. FIG. 9 alsodemonstrates that for the substantially increased PEB time duration abroad range of CD values, between 50 and 90 nm, is quasi-isofocal, whichmeans that the curvature of the Bossung curves for CD values differentfrom the isofocal CD is smaller. This implies that, by the very simpleextension of the PEB step, the lithographic process in general becomesmuch less sensitive to focus variation for a broad range of differentpatterns of features on the substrate (wafer). In addition, the newprocess is independent of the orientation and the periodicity of thefeatures in the pattern and therefore can be used for a wide variety ofapplications. For the lower exposure doses of FIG. 9 the quencher ispresent during the entire PEB step.

The invention thus provides a method, which allows tuning of theisofocal CD in an independent way and without changing the aerial image.This method can be easily implemented in current lithographic processesand provides great advantages. It allows tuning of the isofocal CD suchthat it corresponds with the design CD. This means that the range ofapplications for which a given resist can be used is substantiallyenlarged. The capability to tune the isofocal CD provides thepossibility to use the largest possible process window (processlatitudes) under any circumstances and for any pattern structure that isto be printed. The method can also be used to tune the process so as tohave the largest overall performance for printing device features havingdifferent sizes simultaneously.

The invention has been described by means of a positive resist, but canalso be employed in a lithographic process wherein a negative resist isused. The measures according to the invention will generate similareffects in a negative resist, yet on the resist protecting mechanism,i.e. making soluble resist insoluble, instead of on the resistde-protecting mechanism.

The invention can also be used to change the slope of transitionsbetween non-soluble resist material and soluble resist material from anegative slope to at least a zero slope and preferably a positive slope.

In currently used lithographic processes wherein the PEB time durationis, for example, 90 sec, the acid concentration profile in the resistlayer may have negative slopes, which means that the transitions betweennon-soluble and soluble resist material have a negative slope. For apositive resist a negative slope means that the top surface area of arequired, non-soluble resist, feature is larger than its base area. Sucha resist feature is less stable during the developing step than a resistfeature having positive slopes, i.e. having a top surface area smallerthan its base area. For a negative resist feature a negative slope meansthan the top surface area of a required, soluble, resist feature issmaller than its base, which may cause difficulties in removing thesoluble resist portion. As the PEB step changes the acid concentrationprofile in the resist layer and thus the position and slopes of thetransition between non-soluble and soluble resist material, the PEB timeduration can be used as a process parameter to change the slopes.

The results denoted in FIGS. 2, 5 b, 6 b, 7, 8 and 9 were obtained bymeans of a resist layer having a thickness of about 300 nm. Thisindicates that the invention works very well with such a resistthickness, which is a conventional one. The invention thus can be usedin conventional lithographic process circumstances.

If, according to the invention a longer PEB time is used, the magnitudeof slope of a transition between non-soluble and soluble resist materialmay change. For example a slope of 90°, obtained with a conventionalprocess using a PEB time of 90 sec, may change to a slope of, forexample, 80° if the PEB time is extended to 180 sec. A slope of 90°means that a fictive wall separating non-soluble and soluble resistmaterial is perpendicular to the surface planes of the resist layer. Thechange in slope magnitude is due to absorption of exposure radiation bythe resist layer, which causes the exposure intensity at the top of thelayer to be larger than at the base of the layer. The extended PEB timemay cause in a positive resist the slope magnitude to become too smalland in a negative resist the negative slope magnitude to become toolarge. To counteract the varying absorption over the resist thickness,underlying the slope problems measures can be taken, which are differentfor a positive resist and a negative resist. For a positive resistso-called surface inhibition may be used, which means that lessradiation is absorbed at the top of the resist layer. For as negativeresist surface the slope problem can be solved by using a resist thatshows, for the conventional process, a positive slope, which is obtainedby strong surface enhancement, and to increase the dissolution rateduring development step by using a developer solution having a higherdeveloper concentration. With respect to the development step, theprocesses for the positive resist and for the negative resist are nolonger symmetrical; for the negative resist a higher concentrationdeveloper is used to avoid a negative slope. By using the aboveadditional measures, the method of the invention is improved..

Using a longer PEB time may affect the throughput of the lithographicprocess. Throughput is understood to mean the number of substrates thatcan be processed in a unit of time. The exposure time of a lithographicprojection (exposure) apparatus is for example 90 sec. If, as is usualin a conventional process, the PEB time is also 90 sec, a steady flow ofexposed substrates from the exposure apparatus to the PEB device, alsocalled hot plate, can be maintained. If the PEB time is, for example 260sec, a substrate that has been exposed has to wait 170 sec before it canbe placed in the PEB device, which means that the throughput of theprocess is considerably decreased.

By using a number of PEB devices corresponding to the ratio of the PEBtime duration and the exposure time for one substrate, the highthroughput of the process can be maintained. For the given example withan exposure time of 90 sec, inclusive of alignment of the substraterelative to the mask pattern, and a PEB time of 260 sec, three PEBdevices will be used. If a first exposed substrate is transported to thefirst PEB device, a second exposed substrate to the second PEB device, athird exposed substrate to the third PEB device, a fourth exposedsubstrate to the first PEB device and so on, the original highthroughput can be maintained, effective use being made of the fact thatat an IC (device) manufacturing site, also called a Fab, a number of hotplates are present, which are not in use simultaneously.

A general problem encountered in lithographic processes is that thefeature printed from a dense line having a given design CD, thus a CD ina mask pattern, is broader than the printed feature from an isolatedline having the same design CD. An isolated line, or feature, isunderstood to mean a feature having no neighboring features in asurrounding area of a size of the order of the feature width. A denseline, or feature is understood to mean a feature, which forms part of aseries of features at a mutual distance in the order of the width of thefeature. For example, an isolated feature having a design CD of 100 nmis printed as a feature having a width of 90 nm, whilst a dense featurehas a width of 110 nm. To solve this problem, i.e. reduce or eliminatethe difference in printed width, the isodense bias principle can beused. This principle is based on optical proximity correction (OPC). OPCmeans that in the neighborhood of a design device feature one or moreadditional features are arranged. The additional features are so smallthat they are not imaged as such, but they do influence the wave frontof the exposure beam portion that images the design feature and thus theimage of the design feature. By means of specific OPC features in themask pattern the printed feature width from a dense feature and from anisolated feature can be made equal to each other.

However, it was discovered that an increase of the PEB time causes anenlargement of the difference between the width of a printed densefeature and the width of a printed isolated feature. For example, if thePEB time is increased from 90 sec to 260 sec, the width of the printedisolated feature will be 100 nm and that of the printed dense featurewill be 130 nm. The original OPC features cannot correct the differencein width.

According to the invention this problem can be eliminated if in thedesign stage the envisaged PEB time duration is used as a designparameter to determine the design width of the design pattern offeatures.

The OPC features for printed feature width correction can now be adaptedto the PEB time to be used so that the width difference can beeliminated again. In this way a further refinement of the method isobtained. It is also possible to adapt other OPC features, which areused for purposes other than printed line width control, to the PEB timeduration chosen.

In the above explanation it has been suggested that a printed featurewould have the same width as the corresponding feature in the maskpattern. This would imply that the projection system is a 1:1 imagingsystem. Usually a lithographic projection apparatus has a magnificationof, for example 1/4 or 1/5 , which means that a mask feature has a widththat is four or five times the width of the printed feature. Themagnification of the projection system was not taken into account inorder to keep the explanation as simple as possible.

The purpose of the invention is to improve a method of level-by-levelmanufacturing of a device, which comprises device features distributedover different levels, which method employs a number of processes forconfiguring device features, each process for one device level. Byimplementing the invention in at least one of the configuring processesthe invention is also embodied in this method.

As the new pattern forming method results in a device having smallerminimum device features and/or better defined feature sizes, theinvention is also embodied in such a device.

Although the invention has been described by means of a specificlithographic projection apparatus and by means of the manufacture ofICs, it is not limited thereto. The invention can also be used in themanufacture of other devices having small feature sizes, like crystalpanels, thin-film magnetic heads, integrated and planar optical systemsetc. Moreover, the invention can be used in combination with anyprojection apparatus, which is capable of forming the required aerialimage.

1. A method of forming a pattern of features having sub-micron width ina device substrate layer, which method includes the steps of forming aresist layer of one the resist types: positive resist and negativeresist on the substrate; providing a mask having a mask patterncorresponding to the pattern of features to be formed in the substratelayer; illuminating the resist layer via the mask pattern by means of aprojection beam providing an exposure dose, thereby generating an acidconcentration profile in the resist layer around each imaged feature;heating the illuminated resist layer during a post exposure baking (PEB)step so that, starting from the highest illumination intensity areas thematerial of a positive resist layer becomes soluble and the material ofa negative resist layer becomes insoluble, respectively in a developersolution; developing the resist layer in the developer solution so thatresist material is removed from resist layer areas having a solubilityabove a threshold value so that a resist profile pattern is obtained;removing material from or adding material to areas of the substratelayer, which areas are delineated by the resist profile pattern, so thatthe required pattern of features is formed in the substrate layer,characterized in that the time duration of the PEB step and the exposuredose are adapted to the design width of the features to be formed.
 2. Amethod as claimed in claim 1, wherein during the PEB step transitionsbetween non-soluble and soluble resist material initially have anegative slope, characterized in that an enlarged PEB time duration isused to push the slopes to at least zero slopes and preferably positiveslopes.
 3. A method as claimed in claim 1, characterized in that aresist layer having a thickness in the range of 300 to 350 nm is used.4. A method as claimed in claim 1, characterized in that a resist havingan adapted radiation absorption gradient is used to reduce changes inthe slopes of transitions between non-soluble and soluble resistmaterial which are due to extended PEB time duration.
 5. A method asclaimed in claim 1, using a same mask pattern for successively forming asame pattern in a substrate layer of a batch of substrates by means of asame lithographic exposure apparatus, characterized in that for carryingout the PEB steps for successively exposed substrates a number of PEBdevices is used, which number substantially corresponds to the ratio ofthe PEB time duration and the exposure time for one substrate.
 6. Amethod as claimed in claim 1, wherein the step of providing a maskpattern includes designing a pattern having optical proximity correctionfeatures, characterized in that in the design stage the envisaged PEBtime duration is used as a design parameter to determine the designwidth of the design pattern of features.
 7. A method as claimed in claim1, characterized in that the time duration of the PEB step is enlargedto form device features having a smallest dimension, which is smallerthan the corresponding dimension in an aerial image of the mask pattern,the aerial image being formed by the projection beam in the resistlayer.
 8. A method as claimed in claim 7, characterized in that the PEBstep is performed during at least 140 seconds and that a correspondinglysmaller exposure dose is used to obtain feature widths smaller than 80nm.
 9. A method as claimed in claim 1 for use in a lithographic processhaving an isofocal CD, characterized in that the isofocal CD is tuned tothe design CD by adapting the PEB time duration and the exposure dose.10. A method as claimed in claim 1, characterized in that use is made ofa binary mask pattern.
 11. A method as claimed in claim 1 characterizedin that use is made of a phase shifting mask pattern.
 12. A method oflevel-by-level manufacturing of a device, which comprises devicefeatures distributed over different levels, which method employs anumber of processes for configuring device features each process for onedevice level, characterized in that at least one of the configuringprocesses comprises the method as claimed in claim
 1. 13. A devicemanufactured by means of the method as claimed in claim 1.